It is very important to improve the quality and reliability of microprocessor integrated circuits. One way to do this is to separately test each individual block of circuitry within the microprocessor, in addition to testing the functionality of the microprocessor as a whole.
An array of storage elements, such as memory cells or register cells, is a common block of circuitry found in most microprocessors. Instruction, data, and address caches are examples of common types of arrays used in microprocessors. Also, some of today's microprocessors use an array of storage elements to store control information. An example of such an array is a control RAM (Random Access Memory), also called a microram. The data values output from the microram are used to control other circuitry within the microprocessor. Often a microram is embedded so deeply within the microprocessor circuitry that the microram does not have a data path that allows the contents of the microram to be transmitted external to the microprocessor. Thus it may be very difficult to properly test the functionality of the microram separate from the functionality of other circuitry within the microprocessor.
As a result, some of today's microprocessors use a serial scan path in order to test an array of storage elements. A serial scan path allows the array to be tested independent of surrounding blocks of circuitry. A serial scan path is a serial data path that can be used both to shift data values into and shift data values out of the array of storage elements. For example, a serial scan path can be used to initialize an array of storage elements by serially shifting in the desired initial values. Likewise, a serial scan path can be used to verify the contents of an array of storage elements by serially shifting out the values presently residing in the array.
For normal operation, most arrays of storage elements require output latches which are used when outputting data values from the array. Note that each data value stored in the array may consist of one or more binary bits. Generally, there is one output latch for each bit of the data value. So when a data value is read out of the array, one latch is required to store each bit of the data value. In some prior art devices, scan testing of the array required one additional output latch for each bit of the data value. Some prior art devices required an extra latch for each storage element in the array in order to allow scan testing of associated combinational logic.
Some prior art devices using scan testing required the implementation of both a master latch and a slave latch which were linked together in order to form a serial shift register. Thus in order to perform scan testing on an array, an extra latch circuit was required for each parallel output bit of the array. Because microrams often have one hundred or more parallel outputs, that meant that one hundred or more extra latch circuits were required in order to implement scan testing of some arrays. Thus scan testing sometimes required a significant amount of extra semiconductor area for latch circuitry that was only used during testing.